1. Field of the Invention
The present invention relates to methods of manufacturing semiconductor devices and particularly to an improvement of a manufacturing method for forming a direct electric contact portion (referred to hereinafter as a contact) between an impurity-diffused region in a semiconductor substrate and a connection layer of polycrystal silicon in a semiconductor integrated circuit device.
2. Description of the Background Art
A conventional method for forming a contact in a semiconductor device is disclosed for example in Japanese Patent Laying-Open No. 165681/1980. FIGS. 1A and 1B are partial sectional views specifically showing successive steps of a method of forming a contact in a conventional method of manufacturing a semiconductor device.
Referring first to FIG. 1A, a gate insulating layer 7 is formed on a P type semiconductor substrate 1 by using a thermal oxidation process or the like. A single-layer of polycrystal silicon or a two-layer of polycrystal silicon and refractory metal silicide is deposited on the gate insulating layer 7 by a chemical vapor deposition (CVD) process or the like. After that, those layers are selectively removed by a photolithographic process, whereby gate electrodes 8 are formed with a spacing. Arsenic ions as an N type impurity are implanted into the semiconductor substrate 1 between the gate electrodes 8 by an ion implantation method. Then, heat treatment is applied, whereby an N type impurity diffused layer 9 is formed as a source or drain region of a transistor or the like. After an interlayer insulating layer 10 is deposited over the whole surface by a chemical vapor deposition process or the like, the interlayer insulating layer 10 is selectively removed by using a photolithographic technique, whereby a surface region of the N type impurity diffused layer 9, where a contact 11 is to be formed, is expose. N type impurity ions of an element having a relatively large mass number such as arsenic are implanted into the exposed region in the direction shown by the arrows A using a resist layer 15 as a mask. As a result, an N type impurity layer 12 is formed.
Referring to FIG. 1B, after the resist layer 15 is removed, a polycrystal silicon layer 13 is deposited over the surface region for the contact 11 and the interlayer insulating layer 10 by a chemical vapor deposition process or the like. Then, heat treatment is applied to the polycrystal silicon layer 13, whereby the contact 11 is formed by the N type impurity layer 12 and the impurity contained in the N type impurity layer 12 is diffused reversely into the polycrystal silicon layer 13. Thus, the contact 11 is formed as an electric contact portion between the polycrystal silicon layer 13 and the N type impurity layer 9.
However, the conventional contact forming method as described above has disadvantages that an average value of contact resistance and a standard deviation thereof among a plurality of contacts manufactured in a semiconductor chip as a single semiconductor device become large and cannot be disregarded as a connection resistance. The causes of such increase of the average value of contact resistance and the standard deviation thereof are considered to be as follows.
(a) A thin oxide layer naturally formed before deposition of the polycrystal silicon layer 13 is not removed after formation of the upper connection layer and a very thin naturally oxidized layer exists unavoidably on the surface of the contact 11 between the N type impurity layer 9 and polycrystal silicon layer 13.
(b) Although the impurity is reversely diffused into the polycrystal silicon layer 13, the impurity cannot be diffused in a sufficiently uniform manner in the polycrystal silicon layer 13.
On the other hand, a method for controlling contact resistance is disclosed for example in "PASPAC WITH LOW CONTACT RESISTANCE AND HIGH RELIABILITY IN CMOS LSIS", 1987 Symposium on VLSI Technology, Digest of Technical Papers, May 18-21 '87, pp. 77-78, in which after a polycrystal silicon layer is deposited on a region for forming a contact, conductive impurity ions (phosphorus (P) or boron fluoride (BF.sub.2)) are implanted into the polycrystal silicon layer. According to this document, it is indicated that the contact resistance can be controlled dependent on a dose of impurity ions implanted into the polycrystal silicon layer. However, it is difficult to control the average value of contact resistance and the standard deviation thereof by only a dose of impurity ions implantation. Further, the controlling of a dose of impurity ions is not sufficient to break a naturally oxidized layer, which is considered to be a cause of increase of an average value of contact resistance and its standard deviation.